Compatible Systems RISC 2800i Manual de usuario descargar pdf (Pagina 45)

MPC7448 RISC Microprocessor Hardware Specifications, Rev. 4

Freescale Semiconductor 45

System Design Information

Figure 21. JTAG Interface Connection

HRESET

From Target

Board Sources

HRESET

SRESET

VDD_SENSE

2 KΩ

10 KΩ

CHKSTP_IN

TMS

TDO

TDI

TCK

TMS

TDO

TDI

TCK

TRST

(if any)

COP Header

Key

QACK

10 KΩ

QACK

CHKSTP_OUT

KEY

No Pin

COP Connector

Physical Pin Out

10 KΩ

2 KΩ

0 Ω

Notes:

1. RUN/STOP

, normally found on pin 5 of the COP header, is not implemented on the MPC7448. Connect

pin 5 of the COP header to OV

with a 10-KΩ pull-up resistor.

2. Key location; pin 14 is not physically present on the COP header.

3. Component not populated. Populate only if debug tool does not drive QACK

4. Populate only if debug tool uses an open-drain type output and does not actively negate QACK

5. If the JTAG interface is implemented, connect HRESET

from the target source to TRST from the COP

header though an AND gate to TRST

of the part. If the JTAG interface is not implemented, connect

HRESET

from the target source to TRST of the part through a 0-Ω isolation resistor.

6. The COP port and target board should be able to independently assert HRESET

and TRST to the

processor in order to fully control the processor as shown above.

TRST

10 KΩ

1 2 ... 40 41 42 43 44 45 46 47 48 49 50 ... 59 60

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Compatible Systems RISC 2800i Manual de usuario Pagina 45

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